As the number of surface-mountable external contacts on an underside of a semiconductor device increases, there is the risk that larger areas of external contacts will not be fixed reliably onto corresponding contact pads of a parent circuit board during surface mounting. The rising number of external contacts per semiconductor device and relentless miniaturization of the external contact sizes increase this risk. In particular for semiconductor devices manufactured using the WLP process (wafer level package process), the size of the surface-mountable external contacts are reduced to such an extent that an inspection using x-rays, for example, to check for reliable bonding or surface mounting is costly and time-consuming.
Even using visual systems such as a stereo microscopic examination to inspect from the side is time-consuming and not suitable for mass production. The problem with visual inspection of reliable electrical bonding is exacerbated by the external contacts not being arranged immediately at the lower outer edges of the semiconductor device; instead, they tend to be positioned at an edge offset from the lower outer edges of the semiconductor device. This makes visual inspection more difficult, for example checking whether a meniscus of solder has been formed between an external contact pad of a semiconductor device and a contact pad of a parent circuit board.
This is illustrated in FIG. 17, which shows a schematic cross-section through a semiconductor device arrangement 28 with a surface-mountable semiconductor device 4 according to the prior art. This semiconductor device 4 is mounted by its surface-mountable external contacts 5 on contact pads 29 of a parent circuit board 17. Visual inspection of the lower outer edges 18 and 20 of the semiconductor device 4 is extremely difficult, especially as the external contact pads 13 for the external contacts 5 in the outer edge regions 9 and 11 are not arranged immediately at the lower outer edges 18 and 20. This makes visual inspection of a solder meniscus, which is formed in a reliable solder connection of the external contacts 5 onto the contact pads 29 of a parent circuit board 17, more difficult, and in many cases this is only possible in the outer edge regions 9 and 11 using highly complex technology and equipment.
FIG. 18 shows a schematic plan view of the semiconductor device arrangement 28 of FIG. 17. The external contacts 5 arranged in rows 34 and columns 35 on the external contact pads 7 and 13 are not visible in this plan view and are hence identified by dashed lines. Thus examining or inspecting a reliable electrical connection between the parent circuit board 17 and the semiconductor device 4 when viewed from above is only possible by a technically complex X-ray examination of the semiconductor device 4 and the circuit board 17 in this semiconductor device arrangement 28.